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| Job Type |
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| Position: |
Sr. IC Digital Design Engineer |
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| Industry: |
Semiconductor |
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| Region: |
West Coast |
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| Job Type: |
Design - Digital/Analog |
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| Salary: |
DOE |
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| Job Req#: |
DIGDES210 |
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| Description |
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| This is a permanent position for Senior/Principal ASIC Design Engineer needed to implement Digital functions within mixed signal ASICs. Initial tasking to be Real-Time Clocks, I2C Interface & Register Map, and CODEC integration. |
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| Requirements |
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| • 10+ years in Digital Design, at least 5+ years in Verilog/Synthesis based ASIC Design
• Verilog language & simulation verification experience
• Mixed-signal simulation (Cadence AMS), interfacing with analog functions
• Logic Synthesis & Static Timing Analysis
• Design for test, scan insertion, ATPG, Functional Test Vectors
• Interfacing with Place & Route, Back-annotated simulation verification
• Taken at least 2 ASICs through entire flow of specification to prototypes
• This individual must have the knowledge and capability to execute the entire design process without significant assistance, as most all other engineers at this location are analog designers
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| Contact |
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| Paul Altmeyer |
| 800-770-7166 x32 |
| paul@analoggroup.com |
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